Data Structures

Data Structures

Here are the data structures with brief descriptions:

Cdim3
CHIP_ARRAY3D_DESCRIPTOR
CHIP_ARRAY_DESCRIPTOR
Chip_Memcpy2D
CHIP_MEMCPY3D
CHIP_MEMSET_NODE_PARAMS
CHIP_RESOURCE_DESC
CHIP_RESOURCE_VIEW_DESC
CHIP_TEXTURE_DESC
ChipAccessPolicyWindow
ChipArrayMapInfo
ChipChannelFormatDesc
ChipChildGraphNodeParams
ChipDeviceArch_t
ChipDeviceProp_t
ChipDeviceProp_tR0000
ChipEventRecordNodeParams
ChipEventWaitNodeParams
ChipExtent
ChipExternalMemoryBufferDesc
ChipExternalMemoryHandleDesc
ChipExternalMemoryMipmappedArrayDesc
ChipExternalSemaphoreHandleDesc
ChipExternalSemaphoreSignalNodeParams
ChipExternalSemaphoreSignalParams
ChipExternalSemaphoreWaitNodeParams
ChipExternalSemaphoreWaitParams
ChipFuncAttributes
ChipFunctionLaunchParams
ChipGraphEdgeData
ChipGraphInstantiateParams
ChipGraphNodeParams
ChipHostNodeParams
ChipIpcEventHandle_t
ChipIpcMemHandle_t
ChipKernelNodeParams
ChipLaunchAttributeValue
ChipLaunchParams
ChipMemAccessDesc
ChipMemAllocationProp
ChipMemAllocNodeParams
ChipMemcpy3DParms
ChipMemcpyNodeParams
ChipMemFreeNodeParams
ChipMemLocation
ChipMemPoolProps
ChipMemPoolPtrExportData
ChipMemsetParams
ChipMipmappedArray_t
ChipPitchedPtr
ChipPointerAttribute_t
ChipPos
ChipResourceDesc
ChipResourceViewDesc
ChipTextureDesc
ChipUUID
Chsa_amd_barrier_value_packet_t	AMD barrier value packet. Halts packet processing and waits for (signal_value & ::mask) ::cond ::value to be satisfied, where signal_value is the value of the signal ::signal
Chsa_amd_event_t	AMD GPU event data passed to event handler
Chsa_amd_gpu_hw_exception_info_t	AMD GPU HW Exception event data
Chsa_amd_gpu_memory_fault_info_t	AMD GPU memory fault event data
Chsa_amd_hdp_flush_t
Chsa_amd_image_descriptor_t	Encodes an opaque vendor specific image format. The length of data depends on the underlying format. This structure must not be copied as its true length can not be determined
Chsa_amd_ipc_memory_t	256-bit process independent identifier for a ROCr shared memory allocation
Chsa_amd_memory_access_desc_t
Chsa_amd_memory_pool_link_info_t	Link properties when accessing the memory pool from the specified agent
Chsa_amd_memory_pool_t	A memory pool encapsulates physical storage on an agent along with a memory access model
Chsa_amd_pointer_info_t	Describes a memory allocation known to ROCr. Within a ROCr major version this structure can only grow
Chsa_amd_profiling_async_copy_time_t	Structure containing profiling async copy time information
Chsa_amd_profiling_dispatch_time_t	Structure containing profiling dispatch time information
Chsa_amd_svm_attribute_pair_t
Chsa_amd_vendor_packet_header_t	AMD vendor specific AQL packet header
Chsa_amd_vmem_alloc_handle_t	Struct containing an opaque handle to a memory allocation handle
Chsa_pitched_ptr_t
CsurfaceReference
CtextureReference