Syntax of gfx1011 and gfx1012 Instructions#
Introduction#
This document describes the syntax of instructions specific to gfx1011 and gfx1012.
For a description of other gfx1011 and gfx1012 instructions see Syntax of GFX10 RDNA1 Instructions.
Notation#
Notation used in this document is explained here.
Overview#
An overview of generic syntax and other features of AMDGPU instructions may be found in this document.
Instructions#
DPP16#
INSTRUCTION DST SRC0 SRC1 MODIFIERS ————————————————————————————————————————————————————————————————————————————————————————————————————— v_dot2c_f32_f16_dpp vdst, vsrc0:f16x2, vsrc1:f16x2 dpp16_ctrl row_mask bank_mask bound_ctrl fi v_dot4c_i32_i8_dpp vdst, vsrc0:i8x4, vsrc1:i8x4 dpp16_ctrl row_mask bank_mask bound_ctrl fi
DPP8#
INSTRUCTION DST SRC0 SRC1 MODIFIERS —————————————————————————————————————————————————————————————————————————————————— v_dot2c_f32_f16_dpp vdst, vsrc0:f16x2, vsrc1:f16x2 dpp8_sel fi v_dot4c_i32_i8_dpp vdst, vsrc0:i8x4, vsrc1:i8x4 dpp8_sel fi
VOP2#
INSTRUCTION DST SRC0 SRC1 ———————————————————————————————————————————————————————————————— v_dot2c_f32_f16 vdst, src0:f16x2, vsrc1:f16x2 v_dot4c_i32_i8 vdst, src0:i8x4, vsrc1:i8x4
VOP3P#
INSTRUCTION DST SRC0 SRC1 SRC2 MODIFIERS ——————————————————————————————————————————————————————————————————————————————————————————————————— v_dot2_f32_f16 vdst, src0:f16x2, src1:f16x2, src2:f32 neg_lo neg_hi clamp v_dot2_i32_i16 vdst, src0:i16x2, src1:i16x2, src2:i32 clamp v_dot2_u32_u16 vdst, src0:u16x2, src1:u16x2, src2:u32 clamp v_dot4_i32_i8 vdst, src0:i8x4, src1:i8x4, src2:i32 clamp v_dot4_u32_u8 vdst, src0:u8x4, src1:u8x4, src2:u32 clamp v_dot8_i32_i4 vdst, src0:i4x8, src1:i4x8, src2:i32 clamp v_dot8_u32_u4 vdst, src0:u4x8, src1:u4x8, src2:u32 clamp